Enigma People Solutions is recruiting a senior/principal digital design engineer to join our client’s expanding European Design Centre in Edinburgh, Scotland. Critical to their new product development plans, the Centre designs advanced power control IC’s for a broad range of product applications. Our client is recognised world-wide as providing state-of-the-art automotive power integrated circuits.

In this position, you will be part of a growing and dynamic team that primarily focuses on developing mixed-signal motor drive IC’s for industry leading customers. You will be responsible for architecting, implementing and verifying microcontroller-based systems and you will gain exposure to the latest trends in automotive motors control performance requirements, architectures and implementations.

RESPONSIBILITIES

Analysis of design requirements, contribution to architectural decisions and writing of design specifications.

• Verilog RTL design at both IP and SoC level, incorporating design-for-test.
• Support verification via implementation of test-benches and RTL/gate-level simulation and debug.
• Interface with physical implementation team for the definition of physical and timing constraints.
• Contribute to the continuing evolution of the design flow and product quality by seeking out new methodologies and best practices.

 

KEY RELATIONSHIPS

Internal

Collaborate with digital design and verification engineers.

• Interact with physical implementation design team.
• Review of requirements with system engineers.
• Interact with test engineers for ATPG programs.

External

• Liaise with off-site design teams as required.
• Communicate with EDA and tool vendors.

 

PERSON SPECIFICATION

Qualifications

Essential:

Prospective candidates should have a PhD or Master degree (or equivalent) in Electronics or a related field and a solid experience with design in an embedded system.

Desirable:

• Strong knowledge of protocols for connecting CPUs, interconnect fabrics and peripherals together as well as knowledge of the various high level functions such as boot protocols, clocking, power, etc.  required for large SOCs.
• Experience in design and verification of the integration of peripheral IPs with the focus being on correctness of the interfaces and operation of the various full-chip SOC protocols.
• Familiarity with Cadence toolsets.
• Familiarity with DFT implementations such as scan, boundary scan and BIST techniques.
• Familiarity with FPGA prototyping.

 

Skills, Knowledge and Aptitudes

• Competent in digital design techniques.
• Strong skills in front-end RTL design using Verilog or VHDL.
• Good knowledge of the overall front-to-back digital design flow.
• Good verbal and written communication skills
• Ability to work in a multi-cultural team environment

• Candidates should also be able to demonstrate:

• Good presentation skills in English and the ability to present information in a clear and concise manner
• A high level of commitment and self-motivation
• The ability to work as part of a world-wide development team with diverse engineering disciplines

 

Our client is committed to equal opportunity employment.

 

TRAVEL REQUIREMENTS

Domestic and International travel may be required for this role.  The below provides an indication only of the amount, type and locations of travel. This is subject to change depending on business requirements.

• National Travel: 5-10  %
• International Travel:  5-10%

 

Travel Locations

• Dependent on work that may arise, most likely travel will be within Europe, the Americas and Asia