Verification
Senior Analog and Mixed Signal verification engineer
Edinburgh, Scotland
Salary in line with experience, alongside excellent benefits package
Enigma People Solutions is recruiting a Principal/Senior Analog Mixed Signal verification engineer to join our client’s expanding Design Centre in Edinburgh, Scotland. You will be part of a new verification team which collaborates on the mixed-signal verification of gate-driver ICs and embedded SoCs based on innovative new core architectures. This team is critical to our client’s new product development plans including advanced power control IC’s for a broad range of product applications.
RESPONSIBILITIES
- Implementation of chip-level mixed signal simulation environments
- Production of AMS Verification Plan
- Develop chip-level self-checking models
- Chip top-level verification sign-off ahead of first silicon tape-out
- Coordinate verification responsibilities with Digital and Analog Design/Verification teams.
- Maintenance and continuous improvement of verification methodology, automation, and regression control.
KEY RELATIONSHIPS
Internal
- Collaborate with Systems engineers.
- Collaborate with Digital design and Verification engineers.
- Collaborate with Analog design engineers.
- Collaborate on requirements and verification tests definition with the wider team.
External
- Liaise with off-site design teams as required.
- Communicate with EDA and tool vendors.
PERSON SPECIFICATION
Essential Qualifications:
- Possess at least a bachelor’s degree in Electronic Engineering (MSEE preferred)
- Should have several years’ experience in AMS verification
- Must be knowledgeable in both Analog and digital design fundamentals.
Desirable:
- Experience of SystemVerilog programming
- Requirements tracker like Jama (or equivalent)
- Knowledge of UVM-MS concepts
Skills, Knowledge and Aptitudes
- Must have excellent written and verbal communication skills
- Proficient using Cadence tools: Virtuoso, AMS designer (Maestro/CLIPS)
- Sufficient understanding of Analog/mixed signal design practices to allow for creation of accurate behavioural models in SV RNM, Verilog-ams.
- Able to solve challenging problems during verification and debug
- Some scripting knowledge to facilitate the regression testing of designs (e.g. Tcl, Python, POSIX shell).